SN74ALS667NSR

SN74ALS667NSR
Mfr. #:
SN74ALS667NSR
説明:
Latches Octal DType TRANPNT Read Back Latches
ライフサイクル:
メーカー新製品
データシート:
SN74ALS667NSR データシート
配達:
DHL FedEx Ups TNT EMS
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ECAD Model:
詳しくは:
SN74ALS667NSR 詳しくは SN74ALS667NSR Product Details
製品属性
属性値
メーカー:
テキサスインスツルメンツ
製品カテゴリ:
ラッチ
JBoss:
Y
回路数:
8 Circuit
ロジックタイプ:
Dタイプ透明ラッチ
ロジックファミリ:
ALS
極性:
反転
出力ラインの数:
8 Line
高レベル出力電流:
- 2.6 mA
低レベル出力電流:
32 mA
伝播遅延時間:
20 ns
供給電圧-最大:
5.5 V
供給電圧-最小:
4.5 V
最低動作温度:
0 C
最高作動温度:
+ 70 C
パッケージ/ケース:
SOP-24
包装:
リール
関数:
透明
高さ:
1.95 mm
長さ:
15 mm
出力タイプ:
3-State
タイプ:
Dタイプ
幅:
5.3 mm
ブランド:
テキサスインスツルメンツ
取り付けスタイル:
SMD / SMT
チャネル数:
8 Channels
入力行数:
8 Line
動作供給電流:
79 mA
動作供給電圧:
5 V
製品タイプ:
ラッチ
リセットタイプ:
マスターセット
ファクトリーパックの数量:
1
サブカテゴリ:
ロジックIC
単位重量:
0.038731 oz
Tags
SN74ALS667N, SN74ALS667, SN74ALS66, SN74ALS6, SN74ALS, SN74AL, SN74A, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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we buy and manage excess electronic components, including excess inventory identified for disposal.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC LATCH TRANSP D 8BIT 24SO
***as Instruments
These 8-bit D-type transparent latches are designed specifically for storing the contents of the input data bus, plus reading back the stored data onto the input data bus. In addition, they provide a 3-state buffer-type output and are easily utilized in bus-structured applications. While the latch enable (LE) is high, the Q outputs of the SN74ALS666 follow the data (D) inputs. The Q\ outputs of the SN74ALS667 provide the inverse of the data applied to its D inputs. The Q or Q\ output of both devices is in the high-impedance state if either output-enable (OE1\ or OE2\) input is at a high logic level. Read back is provided through the read-back control (OERB\) input. When OERB\ is taken low, the data present at the output of the data latches passes back onto the input data bus. When OERB\ is taken high, the output of the data latches is isolated from the D inputs. OERB\ does not affect the internal operation of the latches; however, caution should be exercised to avoid a bus conflict. The SN74ALS666 and SN74ALS667 are characterized for operation from 0°C to 70°C.
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可用性
ストック:
Available
注文中:
5000
数量を入力してください:
SN74ALS667NSRの現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
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