SN74BCT573NSRE4

SN74BCT573NSRE4
Mfr. #:
SN74BCT573NSRE4
説明:
Latches Octal DTYPE Transparent Latches
ライフサイクル:
メーカー新製品
データシート:
SN74BCT573NSRE4 データシート
配達:
DHL FedEx Ups TNT EMS
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ECAD Model:
詳しくは:
SN74BCT573NSRE4 詳しくは SN74BCT573NSRE4 Product Details
製品属性
属性値
メーカー:
テキサスインスツルメンツ
製品カテゴリ:
ラッチ
JBoss:
Y
回路数:
8 Circuit
ロジックタイプ:
Dタイプ透明ラッチ
ロジックファミリ:
BCT
極性:
非反転
静止電流:
62 mA
出力ラインの数:
8 Line
高レベル出力電流:
- 15 mA
低レベル出力電流:
32 mA
伝播遅延時間:
8.2 ns at 5 V
供給電圧-最大:
5.5 V
供給電圧-最小:
4.5 V
最低動作温度:
0 C
最高作動温度:
+ 70 C
パッケージ/ケース:
SO-20
包装:
リール
関数:
透明
高さ:
1.95 mm
長さ:
12.6 mm
出力タイプ:
3-State
タイプ:
Dタイプ
幅:
5.3 mm
ブランド:
テキサスインスツルメンツ
取り付けスタイル:
SMD / SMT
チャネル数:
8 Channels
入力行数:
8 Line
動作供給電圧:
5 V
製品タイプ:
ラッチ
リセットタイプ:
リセットなし
ファクトリーパックの数量:
1
サブカテゴリ:
ロジックIC
単位重量:
0.009408 oz
Tags
SN74BCT573NS, SN74BCT573N, SN74BCT573, SN74BCT57, SN74BCT5, SN74B, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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we buy and manage excess electronic components, including excess inventory identified for disposal.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC LATCH TRANSP OCTAL D 20SO
***ark
ICs, Latches Logic; Logic Family:BCT; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:20-SOP; No. of Pins:20; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes; Output Type:TTL ;RoHS Compliant: Yes
***as Instruments
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches of the ’BCT573 devices are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When the latch enable is taken low, the Q outputs are latched at the logic levels that were set up at the D inputs. A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. (OE)\ does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
モデル 説明 ストック 価格
SN74BCT573NSRE4
DISTI # SN74BCT573NSRE4-ND
IC LATCH TRANSP OCTAL D 20SO
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74BCT573NSRE4
    DISTI # 595-SN74BCT573NSRE4
    Latches Octal DTYPE Transparent Latches
    RoHS: Compliant
    0
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      ストック:
      Available
      注文中:
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      数量を入力してください:
      SN74BCT573NSRE4の現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
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