SN74ABT853PWE4

SN74ABT853PWE4
Mfr. #:
SN74ABT853PWE4
説明:
Bus Transceivers 8 to 9-Bit Parity Bus Transceivers
ライフサイクル:
メーカー新製品
データシート:
SN74ABT853PWE4 データシート
配達:
DHL FedEx Ups TNT EMS
支払い:
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ECAD Model:
詳しくは:
SN74ABT853PWE4 詳しくは SN74ABT853PWE4 Product Details
製品属性
属性値
メーカー:
テキサスインスツルメンツ
製品カテゴリ:
バストランシーバー
JBoss:
Y
ロジックファミリ:
74ABT
入力レベル:
TTL
出力レベル:
TTL
出力タイプ:
3-State
高レベル出力電流:
- 32 mA
低レベル出力電流:
64 mA
伝播遅延時間:
4.8 ns
供給電圧-最大:
5.5 V
供給電圧-最小:
4.5 V
最低動作温度:
- 40 C
最高作動温度:
+ 85 C
パッケージ/ケース:
TSSOP-24
包装:
チューブ
関数:
パリティチェッカー付きバストランシーバー
高さ:
1.15 mm
長さ:
7.8 mm
回路数:
1
製品:
BiCMOS
静止電流:
24 mA
テクノロジー:
BiCMOS
幅:
4.4 mm
ブランド:
テキサスインスツルメンツ
取り付けスタイル:
SMD / SMT
チャネル数:
8
供給電流-最大:
38 mA
動作供給電圧:
4.5 V to 5.5 V
極性:
非反転
製品タイプ:
バストランシーバー
ファクトリーパックの数量:
1
サブカテゴリ:
ロジックIC
単位重量:
0.003175 oz
Tags
SN74ABT853P, SN74ABT853, SN74ABT85, SN74ABT8, SN74AB, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC TRANSCVR 8-9BIT INV 24TSSOP
***as Instruments
The 'ABT853 8-bit to 9-bit parity transceivers are designed for communication between data buses. When data is transmitted from the A bus to the B bus, a parity bit is generated. When data is transmitted from the B bus to the A bus with its corresponding parity bit, the open-collector parity-error (ERR\) output indicates whether or not an error in the B data has occurred. The output-enable (OEA\ and OEB\) inputs can be used to disable the device so that the buses are effectively isolated. The 'ABT853 transceivers provide true data at their outputs. A 9-bit parity generator/checker generates a parity-odd (PARITY) output and monitors the parity of the I/O ports with the ERR\ flag. The parity-error output can be passed, sampled, stored, or cleared from the latch using the latch-enable (LE\) and clear (CLR\) control inputs. When both OEA\ and OEB\ are low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives the designer more system diagnostic capability. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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FIFO 64 x 36 x 2 bidir Synch FIFO Memory
可用性
ストック:
Available
注文中:
3500
数量を入力してください:
SN74ABT853PWE4の現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
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