CD40117BE

Mfr. #:: CD40117BE
説明:: Interface - Specialized Prog Dual 4-Bit
ライフサイクル:: メーカー新製品
データシート:: CD40117BE データシート
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ECAD Model:
詳しくは:: CD40117BE 詳しくは CD40117BE Product Details

製品属性
属性値

メーカー：: テキサスインスツルメンツ

製品カテゴリ：: インターフェイス-特殊

JBoss：: Y

動作供給電圧：: - 0.5 V to + 4 V

最低動作温度：: - 55 C

最高作動温度：: + 125 C

取り付けスタイル：: SMD / SMT

パッケージ/ケース：: PDIP-14

包装：: チューブ

シリーズ：: CD40117B

ブランド：: テキサスインスツルメンツ

製品タイプ：: インターフェイス-特殊

ファクトリーパックの数量：: 25

サブカテゴリ：: インターフェイスIC

単位重量：: 0.032734 oz

Tags: CD40117BE, CD40117, CD4011, CD401, CD40, CD4

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We provide 90-360 days warranty.

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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

CD40117BE 説明

***pNet: TERMINATOR PROG DUAL 14-DIP

***TEXAS: CD40117B is a dual 4-bit terminator that can be programmed by means of STROBE and DATA control bits to function as pull-up or pull-down resistors. The CD40117B can also be programmed to function as latches to terminate any open or unused CMOS logic when used with 3-state logic or during a power-down condition. Considerable savings in power and board space can be realized when this device is used to replace pull-up or pull-down resistors. When the STROBE is in the logic "1" state, the terminator functions as a pull-up resistor if the DATA input is a logic "1" or as a pull down resistor if the DATA input is a logic "0".

***AS INS: When the STROBE is in the logic "0" state, the terminator performs the latch functions, i.e., it follows the changing states of the bus. If the bus goes into the high-Z state or into a power-down condition, the latched terminator retains the data ("1" or "0") that the bus carried before it switched to the high-Z or power-down state. If and when the bus changes from the high-Z state to the state opposite to that which the latch is storing, the bus will override the latch and the terminator will reflect the state on the bus. The small geometries chosen for the inverters in the latch allow this override mode. When checking the data bus whose last state is being preserved by the terminator, a resistor should be used in series with the probe whose input capacitance could trip the small latches. The resistance should be in excess of the output impedance of the latch, i.e., R should be > 30 K at VDD = 10 V.

***OMO Electronic: The STROBE and DATA inputs in each section can be paralleled allowing this device to be used as an 8-bit bus terminator.

***AS INSTRU: The CD40117B types are supplied in 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

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