LTC6954IUFF-3#PBF

Mfr. #:: LTC6954IUFF-3#PBF
メーカー:: Analog Devices Inc.
説明:: Clock Drivers & Distribution Low Phase Noise, Triple Output Clock Distribution Divider/Driver with One LVPECL and two LVDS/CMOS outputs
ライフサイクル:: メーカー新製品
データシート:: LTC6954IUFF-3#PBF データシート
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詳しくは:: LTC6954IUFF-3#PBF 詳しくは LTC6954IUFF-3#PBF Product Details

製品属性
属性値

メーカー：: アナログ・デバイセズ

製品カテゴリ：: クロックドライバーとディストリビューション

JBoss：: Y

シリーズ：: LTC6954

出力タイプ：: CMOS、LVDS、LVPECL

最大出力周波数：: 1.4 GHz

供給電圧-最大：: 3.45 V

供給電圧-最小：: 3.15 V

最低動作温度：: - 40 C

最高作動温度：: + 105 C

取り付けスタイル：: SMD / SMT

パッケージ/ケース：: QFN-36

包装：: チューブ

出力数：: 3 Output

製品：: 時計の分配

タイプ：: クロックディバイダー

ブランド：: アナログ・デバイセズ

最大入力周波数：: 1.4 GHz

動作供給電流：: 300 mA

製品タイプ：: クロックドライバーとディストリビューション

ファクトリーパックの数量：: 52

サブカテゴリ：: クロック＆タイマーIC

単位重量：: 0.011076 oz

Tags: LTC6954, LTC695, LTC69, LTC6, LTC

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We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

LTC6954IUFF-3#PBF 説明

***ical: Clock Fanout Buffer 3-OUT 1-IN 1:3 36-Pin QFN EP Tube

***ear Technology: LTC6954 - Low Phase Noise, Triple Output Clock Distribution Divider/Driver

***ark: Clock Distribution, 1.4Ghz, Qfn-36; Clock Ic Type:clock Distribution, Divider; Frequency:1.4Ghz; No. Of Outputs:3Outputs; Supply Voltage Min:3.15V; Supply Voltage Max:3.45V; Clock Ic Case Style:qfn; No. Of Pins:36Pins Rohs Compliant: Yes

***log Devices: The LTC6954 is a family of very low phase noise clock distribution parts. Each part has three outputs and each output has an individually programmable frequency divider and delay. There are four members of the family, differing in their output logic signal type: LTC6954-1: Three LVPECL outputs LTC6954-2: Two LVPECL and one LVDS/CMOS outputs LTC6954-3: One LVPECL and two LVDS/CMOS outputs LTC6954-4: Three LVDS/CMOS outputs Each output is individually programmable to divide the input frequency by any integer from 1 to 63, and to delay each output by 0 to 63 input clock cycles. The output duty cycle is always 50%, regardless of the divide number. The LVDS/CMOS outputs are jumper selectable via the OUTxSEL pins to provide either an LVDS logic output or a CMOS logic output. The LTC6954 also features Linear Technology’s EZSync system for perfect clock synchronization and alignment every time. All device settings are controlled through an SPI-compatible serial port. Applications Clocking High Speed, High Resolution ADCs, DACs and Data Acquisition Systems Low Jitter Clock Distribution

LTC6954IUFF-3#PBF 詳しくは

LTC695x Ultra-low Jitter Clock Synthesizers: Linear Technology/Analog Devices LTC695x Ultra-low Jitter Clock Synthesizers offer designers clocking solutions that help maximize the data converter signal-to-noise ratio (SNR).

Clock & Timing ADI SLP

LTC6954IUFF-3#PBF

Step1:Vacuum Packaging with PL

Step2:Anti-Static Bag

Step3:Packaging Boxes

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes