SN74LVC112APWT

Mfr. #:: SN74LVC112APWT
説明:: Flip Flops Dual Neg-Edge-Trig J-K Flip-Flop
ライフサイクル:: メーカー新製品
データシート:: SN74LVC112APWT データシート
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詳しくは:: SN74LVC112APWT 詳しくは SN74LVC112APWT Product Details

製品属性
属性値

メーカー: テキサスインスツルメンツ

製品カテゴリ: ロジック-ビーチサンダル

シリーズ: 74LVC

タイプ: JKタイプ

包装: テープ＆リール（TR）代替パッケージ

単位重量: 0.002183 oz

取り付けスタイル: SMD / SMT

パッケージ-ケース: TSSOP-16

入力方式: CMOS / TTL

作動温度: -40°C ~ 85°C (TA)

取付タイプ: 表面実装

出力タイプ: ディファレンシャル

関数: セット（プリセット）とリセット

電圧供給: 1.65 V ~ 3.6 V

回路数: 2

周波数時計: 150MHz

要素数: 2

電流-出力-高-低: 24mA, 24mA

Max-Propagation-Delay-V-Max-CL: 5.9ns @ 3.3V, 50pF

現在-静止: 10μA

ロジックタイプ: JKフリップフロップ

要素あたりのビット数: 1

トリガータイプ: ネガティブエッジ

入力容量: 4.5pF

最高作動温度: + 85 C

最低作動温度: - 40 C

極性: 反転/非反転

供給-電圧-最大: 3.6 V

供給-電圧-最小: 1.65 V

ロジックファミリ: LVC

伝播-遅延-時間: 7.1 ns

高レベル-出力-電流: - 24 mA

低レベル出力電流: 24 mA

入力行数: 3

出力行数: 2

Tags: SN74LVC112AP, SN74LVC112, SN74LVC11, SN74LVC1, SN74LVC, SN74LV, SN74L, SN74, SN7

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

SN74LVC112APWT 説明

***as Instruments: Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-TSSOP -40 to 125

***ark: IC,FLIP-FLOP,DUAL,J/K TYPE,LCX/LVC-CMOS,TSSOP,16PIN,PLASTIC

***et: Flip Flop JK-Type Neg-Edge 2-Element 16-Pin TSSOP T/R

***i-Key: IC FF JK TYPE DUAL 1BIT 16TSSOP

***ment14 APAC: LOGIC, DUAL F-F W/CLR/PST, 16TSSOP, RL25; Flip-Flop Type:JK; Propagation Delay:3.5ns; Frequency:150MHz; Output Current:24mA; Trigger Type:Negative Edge; IC Output Type:Complementary; Supply Voltage Range:1.65V to 3.6V; Logic Case Style:TSSOP; No. of Pins:16; Operating Temperature Range:-40°C to +85°C; SVHC:No SVHC (20-Jun-2011); Logic IC Base Number:74112; Logic IC Family:LVC; Logic IC Function:Dual Negative Edge Triggered J-K Flip-Flop with Clear and Preset; Output Type:Complementary; Package / Case:TSSOP; Supply Voltage Max:3.6V; Supply Voltage Min:1.65V; Termination Type:SMD

SN74LVC112APWT 詳しくは

Logic Solutions: OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More

Market price

モデル	説明	ストック	価格
SN74LVC112APWT DISTI # 29457725	Flip Flop JK-Type Neg-Edge 2-Element 16-Pin TSSOP T/R RoHS: Compliant	10000	2500:$0.3987 1000:$0.4311
SN74LVC112APWT DISTI # SN74LVC112APWT-ND	IC FF JK TYPE DUAL 1BIT 16TSSOP RoHS: Compliant Min Qty: 1000 Container: Tape & Reel (TR)	Temporarily Out of Stock	1000:$0.4785
SN74LVC112APWT DISTI # SN74LVC112APWT	Flip Flop JK-Type Neg-Edge 2-Element 16-Pin TSSOP T/R - Tape and Reel (Alt: SN74LVC112APWT) RoHS: Compliant Min Qty: 1000 Container: Reel	Americas - 0	1000:$0.4619 1500:$0.4399 2500:$0.4249 5000:$0.4109 10000:$0.3999
SN74LVC112APWT DISTI # SN74LVC112APWT	Flip Flop JK-Type Neg-Edge 2-Element 16-Pin TSSOP T/R (Alt: SN74LVC112APWT) RoHS: Compliant Min Qty: 250 Container: Tape and Reel	Europe - 0	250:€0.6399 500:€0.5239 1000:€0.4799 1500:€0.4109 2500:€0.3839
SN74LVC112APW DISTI # 595-SN74LVC112APW	Flip Flops Dual Neg-Edge-Trig J-K Flip-Flop RoHS: Compliant	559	1:$0.8300 10:$0.6940 100:$0.4480 1000:$0.3580 2000:$0.3250 5000:$0.3020 10000:$0.2910 25000:$0.2800
SN74LVC112APWR DISTI # 595-SN74LVC112APWR	Flip Flops Dual Neg Edge Trig RoHS: Compliant	2298	1:$0.6900 10:$0.5800 100:$0.3740 1000:$0.2990 2000:$0.2710 4000:$0.2520 10000:$0.2430 24000:$0.2340
SN74LVC112APWT DISTI # 595-SN74LVC112APWT	Flip Flops Dual Neg-Edge-Trig J-K Flip-Flop RoHS: Compliant	500	1:$1.0400 10:$0.8930 100:$0.6860 250:$0.6860 500:$0.6060 1000:$0.4790 2500:$0.4240 10000:$0.4080
SN74LVC112APWRG4 DISTI # 595-SN74LVC112APWRG4	Flip Flops Dual Neg Edge Trgerd J K FlipFlop RoHS: Compliant	0
SN74LVC112APWTG4 DISTI # 595-SN74LVC112APWTG4	Flip Flops Dual Neg Edge Trgerd J K FlipFlop RoHS: Compliant	0
SN74LVC112APWG4 DISTI # 595-SN74LVC112APWG4	Flip Flops Dual Neg Edge Trgerd J K FlipFlop RoHS: Compliant	0
SN74LVC112APWTE4 DISTI # 595-SN74LVC112APWTE4	Flip Flops Dual Neg-Edge-Trig J-K Flip-Flop RoHS: Compliant	0
SN74LVC112APWT	J-K Flip-Flop, LVC/LCX/Z Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16 RoHS: Compliant	24750	1000:$0.4200 500:$0.4400 100:$0.4600 25:$0.4800 1:$0.5200

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SN74LVC112APWT

Step1:Vacuum Packaging with PL

Step2:Anti-Static Bag

Step3:Packaging Boxes

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes