CD74AC109M96

CD74AC109M96
Mfr. #:
CD74AC109M96
説明:
Flip Flops Dual
ライフサイクル:
メーカー新製品
データシート:
CD74AC109M96 データシート
配達:
DHL FedEx Ups TNT EMS
支払い:
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ECAD Model:
詳しくは:
CD74AC109M96 詳しくは CD74AC109M96 Product Details
製品属性
属性値
メーカー:
テキサスインスツルメンツ
製品カテゴリ:
ビーチサンダル
JBoss:
Y
回路数:
2
ロジックファミリ:
交流
ロジックタイプ:
JKポジティブエッジトリガーフリップフロップ
極性:
反転/非反転
入力方式:
CMOS、LVTTL
出力タイプ:
ディファレンシャル
伝播遅延時間:
129 ns
高レベル出力電流:
- 24 mA
低レベル出力電流:
24 mA
供給電圧-最小:
1.5 V
供給電圧-最大:
5.5 V
最低動作温度:
- 55 C
最高作動温度:
+ 125 C
取り付けスタイル:
SMD / SMT
パッケージ/ケース:
SOP-16
包装:
リール
関数:
デュアル
高さ:
1.58 mm
長さ:
9.9 mm
動作温度範囲:
- 55 C to + 125 C
静止電流:
4 uA
シリーズ:
CD74AC109
幅:
3.91 mm
ブランド:
テキサスインスツルメンツ
チャネル数:
2
入力行数:
2
出力ラインの数:
1
動作供給電圧:
1.5 V to 5.5 V
製品タイプ:
ビーチサンダル
リセットタイプ:
セット、リセット
ファクトリーパックの数量:
2500
サブカテゴリ:
ロジックIC
単位重量:
0.004998 oz
Tags
CD74AC109M9, CD74AC109M, CD74AC109, CD74AC10, CD74AC1, CD74AC, CD74A, CD74, CD7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***as Instruments
Dual Positive-Edge-Triggered J-K Flip-Flops with Set and eset 16-SOIC -55 to 125
***ical
Flip Flop JK# -Type Pos-Edge 2-Element 16-Pin SOIC T/R
***ark
Ic, Jk-Type Flip Flop, Dual, Soic-16; Logic Family / Base Number:74Ac109; Flip-Flop Type:jk; Propagation Delay:10.3Ns; Frequency:100Mhz; Output Current:24Ma; Logic Case Style:soic; No. Of Pins:16Pins; Trigger Type:positive Edge; Ic Rohs Compliant: Yes
***AS INSTRUM
The ’AC109 devices contain two independent J-K\ positive-edge-triggered flip-flops. A low level at the preset (PRE)\ or clear (CLR)\ inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the J and K\ inputs meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the J and K\ inputs can be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K\ and tying J high. They also can perform as D-type flip-flops if J and K\ are tied together.
Logic Solutions
OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More
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可用性
ストック:
Available
注文中:
1986
数量を入力してください:
CD74AC109M96の現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
参考価格(USD)
単価
小計金額
1
$0.60
$0.60
10
$0.49
$4.93
100
$0.32
$31.80
1000
$0.26
$255.00
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