SN74ACT7805-25DLR

SN74ACT7805-25DLR
Mfr. #:
SN74ACT7805-25DLR
説明:
FIFO 256 x 18 synchronous FIFO memory
ライフサイクル:
メーカー新製品
データシート:
SN74ACT7805-25DLR データシート
配達:
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ECAD Model:
詳しくは:
SN74ACT7805-25DLR 詳しくは SN74ACT7805-25DLR Product Details
製品属性
属性値
メーカー:
テキサスインスツルメンツ
製品カテゴリ:
FIFO
JBoss:
Y
データバス幅:
18 bit
バスの方向:
一方向
メモリー容量:
4.5 kbit
タイミングタイプ:
同期
組織:
256 k x 18
回路数:
2
最大クロック周波数:
40 MHz
アクセス時間:
15 ns
供給電圧-最大:
5.5 V
供給電圧-最小:
4.5 V
供給電流-最大:
0.4 mA
最低動作温度:
0 C
最高作動温度:
+ 70 C
パッケージ/ケース:
SSOP-56
包装:
リール
高さ:
2.59 mm
幅:
7.49 mm
ブランド:
テキサスインスツルメンツ
取り付けスタイル:
SMD / SMT
動作供給電圧:
4.5 V to 5.5 V
製品タイプ:
FIFO
ファクトリーパックの数量:
1
サブカテゴリ:
メモリとデータストレージ
単位重量:
0.024508 oz
Tags
SN74ACT7805-2, SN74ACT7805, SN74ACT780, SN74ACT78, SN74ACT7, SN74ACT, SN74AC, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***et
FIFO Mem Sync Dual Width Uni-Dir 256 x 18 56-Pin SSOP T/R
***i-Key
IC SYNC FIFO MEM 256X18 56-SSOP
***as Instruments
The SN74ACT7805 is a 256-word 18-bit clocked FIFO suited for buffering asynchronous data paths up to 67-MHz clock rates and 12-ns access times. Two devices can be configured for bidirectional data buffering without additional logic. Multiple distributed VCC and GND pins, along with Texas Instruments patented output edge control (OECTM) circuit, dampen simultaneous switching noise. The write clock (WRTCLK) and read clock (RDCLK) are free running and can be asynchronous or coincident. Data is written to memory on the rising edge of WRTCLK when WRTEN1 is high, WRTEN2\ is low, and IR is high. Data is read from memory on the rising edge of RDCLK when RDEN\, OE1\, and OE2\ are low and OR is high. The first word written to memory is clocked through to the output buffer, regardless of the RDEN\, OE1\, and OE2\ levels. The OR flag indicates that valid data is present on the output buffer. The FIFO can be reset asynchronously to WRTCLK and RDCLK. RESET\ must be asserted while at least four WRTCLK and four RDCLK rising edges occur to clear the synchronizing registers. Resetting the FIFO initializes the input-ready (IR), output-ready (OR), and half-full (HF) flags low and the almost-full/almost-empty (AF/AE) flag high. The FIFO must be reset upon power up. The SN74ACT7805 is characterized for operation from 0C to 70C.
モデル 説明 ストック 価格
SN74ACT7805-25DLR
DISTI # 296-4457-2-ND
IC SYNC FIFO MEM 256X18 56-SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74ACT7805-25DLR
    DISTI # 296-4457-1-ND
    IC SYNC FIFO MEM 256X18 56-SSOP
    RoHS: Compliant
    Min Qty: 1
    Container: Cut Tape (CT)
    Limited Supply - Call
      SN74ACT7805-25DLR
      DISTI # 296-4457-6-ND
      IC SYNC FIFO MEM 256X18 56-SSOP
      RoHS: Compliant
      Min Qty: 1
      Container: Digi-Reel®
      Limited Supply - Call
        SN74ACT7805-25DLR
        DISTI # 595-SN74ACT780525DLR
        FIFO 256 x 18 synchronous FIFO memory
        RoHS: Compliant
        0
          SN74ACT7805-25DLR 250
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            OMO.#: OMO-SN74ACT74N-TEXAS-INSTRUMENTS

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            FIFO 1024 X 18 Synch FIFO Memory
            可用性
            ストック:
            Available
            注文中:
            3000
            数量を入力してください:
            SN74ACT7805-25DLRの現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
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