SN74ALVC7806-25DLR

Mfr. #:: SN74ALVC7806-25DLR
説明:: FIFO 256 x 18 3.3-V ASynch FIFO Memory
ライフサイクル:: メーカー新製品
データシート:: SN74ALVC7806-25DLR データシート
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詳しくは:: SN74ALVC7806-25DLR 詳しくは SN74ALVC7806-25DLR Product Details

製品属性
属性値

メーカー：: テキサスインスツルメンツ

製品カテゴリ：: FIFO

JBoss：: Y

パッケージ/ケース：: SSOP-56

包装：: リール

ブランド：: テキサスインスツルメンツ

取り付けスタイル：: SMD / SMT

動作供給電圧：: 3 V to 3.6 V

製品タイプ：: FIFO

ファクトリーパックの数量：: 1

サブカテゴリ：: メモリとデータストレージ

単位重量：: 0.024508 oz

Tags: SN74ALVC7806, SN74ALVC780, SN74ALVC7, SN74ALVC, SN74ALV, SN74AL, SN74A, SN74, SN7

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

SN74ALVC7806-25DLR 説明

***i-Key: IC MEMORY FIFO 256X18 56-SSOP

***as Instruments: A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ALVC7806 is an 18-bit FIFO with high speed and fast access times. Data is processed at rates up to 40 MHz with access times of 18 ns in a bit-parallel format. These memories are designed for 3-V to 3.6-V VCC operation. Data is written into memory on a low-to-high transition of the load clock (LDCK) and is read out on a low-to-high transition of the unload clock (UNCK). The memory is full when the number of words clocked in exceeds the number of words clocked out by 256. When the memory is full, LDCK has no effect on the data residing in memory. When the memory is empty, UNCK has no effect. Status of the FIFO memory is monitored by the full (FULL\), empty (EMPTY\), half-full (HF), and almost- full/almost-empty (AF/AE) flags. The FULL\ output is low when the memory is full and high when the memory is not full. The EMPTY\ output is low when the memory is empty and high when it is not empty. The HF output is high whenever the FIFO contains 128 or more words and low when it contains 127 or fewer words. The AF/AE status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset are used to program the almost-empty offset value (X) and the almost-full offset value (Y) if program enable (PEN\) is low. The AF/AE flag is high when the FIFO contains X or fewer words or (256 - Y) or more words. The AF/AE flag is low when the FIFO contains between (X + 1) and (255 - Y) words. A low level on the reset (RESET\) resets the internal stack pointers and sets FULL\ high, AF/AE high, HF low, and EMPTY\ low. The Q outputs are not reset to any specific logic level. The FIFO must be reset on power up. The first word loaded into empty memory causes EMPTY\ to go high and the data to appear on the Q outputs. The data outputs are in the high-impedance state when the output-enable (OE\) is high. The SN74ALVC7806 is characterized for operation from 0C to 70C.

Market price

モデル	説明	ストック	価格
SN74ALVC7806-25DLR DISTI # SN74ALVC7806-25DLR-ND	IC MEMORY FIFO 256X18 56-SSOP RoHS: Compliant Min Qty: 1000 Container: Tape & Reel (TR)	Limited Supply - Call
SN74ALVC7806-25DLR DISTI # 595-SN74ALVC7806-25D	FIFO 256 x 18 3.3-V ASynch FIFO Memory RoHS: Compliant	0

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