CD4033BPWR

Mfr. #:: CD4033BPWR
説明:: IC COUNTR/DIVIDR DECADE 16-TSSOP
ライフサイクル:: メーカー新製品
データシート:: CD4033BPWR データシート
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ECAD Model:
詳しくは:: CD4033BPWR 詳しくは CD4033BPWR Product Details

製品属性
属性値

メーカー: テキサスインスツルメンツ

製品カテゴリ: ロジック-カウンター、ディバイダー

シリーズ: 4000B

包装: テープ＆リール（TR）代替パッケージ

パッケージ-ケース: 16-TSSOP (0.173", 4.40mm Width)

作動温度: -55°C ~ 125°C

取付タイプ: 表面実装

方向: 上

電圧供給: 3 V ~ 18 V

サプライヤー-デバイス-パッケージ: 16-TSSOP

要素数: 1

ロジックタイプ: カウンター、ディケイド

要素あたりのビット数: 5

リセット: 非同期

タイミング: 同期

カウントレート: 16MHz

トリガータイプ: ポジティブエッジ

Tags: CD4033BPWR, CD4033BP, CD4033, CD403, CD40, CD4

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

CD4033BPWR 説明

***ser: Counter ICs CMOS Decade Counter/ Divider

***i-Key: IC COUNTR/DIVIDR DECADE 16-TSSOP

***as Instruments: CD4026B and CD4033B each consist of a 5-stage Johnson decade counter and an output decoder which converts the Johnson code to a 7-segment decoded output for driving one stage in a numerical display. These devices are particularly advantageous in display applications where low power dissipation and /or low package count are important. Inputs common to both types are CLOCK, RESET, & CLOCK INHIBIT; common outputs are CARRY OUT and the seven decoded outputs (a, b, c, d, e, f, g). Additional inputs and outputs for the CD4026B include DISPLAY ENABLE input and DISPLAY ENABLE and UNGATED "C-SEGMENT" outputs. Signals peculiar to the CD4033B are RIPPLE-BLANKING INPUT AND LAMP TEST INPUT and a RIPPLE-BLANKING OUTPUT. A high RESET signal clears the decade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. The CLOCK INHIBIT signal can be used as a negative-edge clock if the clock line is held high. Antilock gating is provided on the JOHNSON counter, thus assuring proper counting sequence. The CARRY-OUT (Cout) signal completes one cycle every ten CLOCK INPUT cycles and is used to clock the succeeding decade directly in a multi-decade counting chain. The seven decoded outputs (a, b, c, d, e, f, g) illuminate the proper segments in a seven segment display device used for representing the decimal numbers 0 to 9. The 7-segment outputs go high on selection in the CD4033B; in the CD4026B these outputs go high only when the DISPLAY ENABLE IN is high. The CD4026B- and CD4033B-series types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

Market price

モデル	説明	ストック
CD4033BPWR DISTI # CD4033BPWR-ND	IC COUNTR/DIVIDR DECADE 16-TSSOP RoHS: Compliant Min Qty: 2000 Container: Tape & Reel (TR)	Limited Supply - Call
CD4033BPWRE4 DISTI # CD4033BPWRE4-ND	IC COUNTR/DIVIDR DECADE 16-TSSOP RoHS: Compliant Min Qty: 2000 Container: Tape & Reel (TR)	Limited Supply - Call
CD4033BPWRG4 DISTI # CD4033BPWRG4-ND	IC COUNTR/DIVIDR DECADE 16-TSSOP RoHS: Compliant Min Qty: 2000 Container: Tape & Reel (TR)	Limited Supply - Call

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