SN74LVTH646DWRG4

SN74LVTH646DWRG4
Mfr. #:
SN74LVTH646DWRG4
説明:
IC TXRX NON-INVERT 3.6V 24SOIC
ライフサイクル:
メーカー新製品
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SN74LVTH646DWRG4 データシート
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SN74LVTH646DWRG4 詳しくは SN74LVTH646DWRG4 Product Details
製品属性
属性値
Tags
SN74LVTH646DW, SN74LVTH646D, SN74LVTH64, SN74LVTH6, SN74LVTH, SN74LVT, SN74LV, SN74L, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC BUS TRANSCEIVER 8BIT 24SOIC
***as Instruments
These bus transceivers and registers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. The ’LVTH646 devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’LVTH646. Output-enable (OE\) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The direction control (DIR) determines which bus receives data when OE\ is low. In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register. When an output function is disabled, the input function still is enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
モデル 説明 ストック 価格
SN74LVTH646DWRG4
DISTI # SN74LVTH646DWRG4-ND
IC TXRX NON-INVERT 3.6V 24SOIC
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74LVTH646DWRG4
    DISTI # 595-SN74LVTH646DWRG4
    Bus Transceivers 3.3V ABT Octal Bus Transceivr Registr
    RoHS: Compliant
    0
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      ブランドニューオリジナル
      可用性
      ストック:
      Available
      注文中:
      2000
      数量を入力してください:
      SN74LVTH646DWRG4の現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
      参考価格(USD)
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      小計金額
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      10
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      100
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      500
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      1000
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      $0.00
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