CAVCH4T245MRSVREP

CAVCH4T245MRSVREP
Mfr. #:
CAVCH4T245MRSVREP
説明:
Translation - Voltage Levels EP 4B Dual-Sply Bus Transc
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CAVCH4T245MRSVREP データシート
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CAVCH4T245MRSVREP 詳しくは CAVCH4T245MRSVREP Product Details
製品属性
属性値
メーカー:
テキサスインスツルメンツ
製品カテゴリ:
翻訳-電圧レベル
JBoss:
Y
伝播遅延時間:
6.9 ns
供給電圧-最大:
3.6 V
供給電圧-最小:
1.2 V
最低動作温度:
- 55 C
最高作動温度:
+ 125 C
取り付けスタイル:
SMD / SMT
パッケージ/ケース:
UQFN-16
包装:
リール
データレート:
380 Mb/s
特徴:
部分的なパワーダウン(Ioff)、過電圧耐性入力、バスホールド
動作温度範囲:
- 55 C to + 125 C
出力タイプ:
3-State
シリーズ:
SN74AVCH4T245-EP
ブランド:
テキサスインスツルメンツ
ロジックファミリ:
AVC
ロジックタイプ:
CMOS
高レベル出力電流:
12 mA
低レベル出力電流:
12 mA
製品タイプ:
翻訳-電圧レベル
ファクトリーパックの数量:
3000
サブカテゴリ:
ロジックIC
パーツ番号エイリアス:
V62/09618-01XE
単位重量:
0.001443 oz
Tags
CAVC, CAV
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We provide 90-360 days warranty.

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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***AS INSTRUMENT
This 4-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. The SN74AVCH4T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
***TEXAS
The SN74AVCH4T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
***AS INSTUMENTS
The SN74AVCH4T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA.
***
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
***AS INS
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.
***AS INTRUMENTS
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
***AS
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Logic Solutions
OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More
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可用性
ストック:
Available
注文中:
1987
数量を入力してください:
CAVCH4T245MRSVREPの現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
参考価格(USD)
単価
小計金額
1
$2.70
$2.70
10
$2.43
$24.30
100
$1.98
$198.00
500
$1.70
$850.00
1000
$1.43
$1 430.00
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