CD40117BPWR

Mfr. #:: CD40117BPWR
説明:: Counter ICs Prog Dual 4-Bit Terminator
ライフサイクル:: メーカー新製品
データシート:: CD40117BPWR データシート
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ECAD Model:
詳しくは:: CD40117BPWR 詳しくは CD40117BPWR Product Details

製品属性
属性値

メーカー：: テキサスインスツルメンツ

製品カテゴリ：: カウンターIC

取り付けスタイル：: SMD / SMT

パッケージ/ケース：: TSSOP-14

ロジックファミリ：: CD40

動作供給電圧：: 3 V to 18 V

包装：: リール

ブランド：: テキサスインスツルメンツ

製品タイプ：: カウンターIC

ファクトリーパックの数量：: 1

サブカテゴリ：: カウンターIC

単位重量：: 0.002004 oz

Tags: CD40117BPWR, CD40117BP, CD40117, CD4011, CD401, CD40, CD4

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We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

CD40117BPWR 説明

***i-Key: IC TERMINATOR PROG DUAL 14-TSSOP

***et: PROGRAMMABLE DUAL 4-BIT TERMINATOR

***i-Key Marketplace: TERMINATOR, 4-LINE, CMOS, PDSO14

***as Instruments: CD40117B is a dual 4-bit terminator that can be programmed by means of STROBE and DATA control bits to function as pull-up or pull-down resistors. The CD40117B can also be programmed to function as latches to terminate any open or unused CMOS logic when used with 3-state logic or during a power-down condition. Considerable savings in power and board space can be realized when this device is used to replace pull-up or pull-down resistors. When the STROBE is in the logic "1" state, the terminator functions as a pull-up resistor if the DATA input is a logic "1" or as a pull down resistor if the DATA input is a logic "0". When the STROBE is in the logic "0" state, the terminator performs the latch functions, i.e., it follows the changing states of the bus. If the bus goes into the high-Z state or into a power-down condition, the latched terminator retains the data ("1" or "0") that the bus carried before it switched to the high-Z or power-down state. If and when the bus changes from the high-Z state to the state opposite to that which the latch is storing, the bus will override the latch and the terminator will reflect the state on the bus. The small geometries chosen for the inverters in the latch allow this override mode. When checking the data bus whose last state is being preserved by the terminator, a resistor should be used in series with the probe whose input capacitance could trip the small latches. The resistance should be in excess of the output impedance of the latch, i.e., R should be > 30 K at VDD = 10 V. The STROBE and DATA inputs in each section can be paralleled allowing this device to be used as an 8-bit bus terminator. The CD40117B types are supplied in 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

Market price

モデル	説明	ストック	価格
CD40117BPWR DISTI # CD40117BPWR-ND	IC TERMINATOR PROG DUAL 14-TSSOP RoHS: Compliant Min Qty: 2000 Container: Tape & Reel (TR)	Limited Supply - Call
CD40117BPWRE4 DISTI # CD40117BPWRE4-ND	IC TERMINATOR PROG DUAL 14-TSSOP RoHS: Compliant Min Qty: 2000 Container: Tape & Reel (TR)	Limited Supply - Call
CD40117BPWRG4 DISTI # CD40117BPWRG4-ND	IC TERMINATOR PROG DUAL 14-TSSOP RoHS: Compliant Min Qty: 2000 Container: Tape & Reel (TR)	Limited Supply - Call
CD40117BPWR DISTI # N/A	Counter ICs Prog Dual 4-Bit Terminator	0
CD40117BPWRG4 DISTI # N/A	Interface - Specialized Programmable Dual 4B Terminator	0
CD40117BPWRE4 DISTI # N/A	Interface - Specialized Prog Dual 4-Bit Terminator	0
CD40117BPWR	Terminator, 4-Line, CMOS, PDSO14 RoHS: Compliant	4000	1000:$0.4500 500:$0.4700 100:$0.4900 25:$0.5100 1:$0.5500

画像	モデル	説明
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CD40117BPWR

Step1:Vacuum Packaging with PL

Step2:Anti-Static Bag

Step3:Packaging Boxes

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes