CD4018BPWRG4

Mfr. #:: CD4018BPWRG4
説明:: IC DIV-BY-N CNTR PRESET 16-TSSOP
ライフサイクル:: メーカー新製品
データシート:: CD4018BPWRG4 データシート
配達:: DHL FedEx Ups TNT EMS
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ECAD Model:
詳しくは:: CD4018BPWRG4 詳しくは CD4018BPWRG4 Product Details

製品属性
属性値

メーカー: テキサスインスツルメンツ

製品カテゴリ: ロジック-カウンター、ディバイダー

シリーズ: 4000B

包装: テープ＆リール（TR）代替パッケージ

パッケージ-ケース: 16-TSSOP (0.173", 4.40mm Width)

作動温度: -55°C ~ 125°C

取付タイプ: 表面実装

方向: -

電圧供給: 3 V ~ 18 V

サプライヤー-デバイス-パッケージ: 16-TSSOP

要素数: 1

ロジックタイプ: Nで除算

要素あたりのビット数: 5

リセット: 非同期

タイミング: 同期

カウントレート: 8.5MHz

トリガータイプ: ポジティブエッジ

Tags: CD4018BPWR, CD4018BP, CD4018B, CD4018, CD401, CD40, CD4

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

CD4018BPWRG4 説明

***ser: Counter ICs CMOS Presettable Divide-By-N Counter

***ark: Counter Logic IC; Logic Family:CD4000; Supply Voltage Min:3V; Supply Voltage Max:18V; Package/Case:16-TSSOP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; Input Type:CMOS; Leaded Process Compatible:Yes ;RoHS Compliant: Yes

***as Instruments: CD4018B types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. CLOCK, RESET, DATA, PRESET ENABLE, and 5 individual JAM inputs are provided. Divide by 10, 8, 6, 4, or 2 counter configurations can be implemented by feeding the Q\5, Q\4, Q\3, Q\2, Q\1 signals, respectively, back to the DATA input. Divide-by-9, 7, 5, or 3 counter configurations can be implemented by the use of a CD4011B to gate the feedback connection to the DATA input. Divide-by functions grater than 10 can be achieved by use of multiple CD4018B units. The counter is advanced one count at the positive clock-signal transition.. Schmitt Trigger action on the clock line permits unlimited clock rise and fall times. A high RESET signal clear the counter to an all-zero condition. A high PRESET-ENABLE signal allows information on the JAM inputs to preset the counter. Anti-lock gating is provided to assure the proper counting sequence. The CD4018B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

Market price

モデル	説明	ストック	価格
CD4018BPWRG4 DISTI # CD4018BPWRG4-ND	IC DIV-BY-N CNTR PRESET 16-TSSOP RoHS: Compliant Min Qty: 4000 Container: Tape & Reel (TR)	Limited Supply - Call
CD4018BPWRG4 DISTI # 595-CD4018BPWRG4	Counter ICs CMOS Presettable Divide-By-N Counter RoHS: Compliant	0

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