CY74FCT2373TQCTE4

CY74FCT2373TQCTE4
Mfr. #:
CY74FCT2373TQCTE4
説明:
Latches Octal D-Type Transp Latches
ライフサイクル:
メーカー新製品
データシート:
CY74FCT2373TQCTE4 データシート
配達:
DHL FedEx Ups TNT EMS
支払い:
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ECAD Model:
詳しくは:
CY74FCT2373TQCTE4 詳しくは CY74FCT2373TQCTE4 Product Details
製品属性
属性値
メーカー:
テキサスインスツルメンツ
製品カテゴリ:
ラッチ
JBoss:
Y
回路数:
1 Circuit
ロジックタイプ:
CMOS
ロジックファミリ:
FCT
極性:
非反転
出力ラインの数:
8 Line
高レベル出力電流:
- 15 mA
低レベル出力電流:
32 mA
伝播遅延時間:
8 ns at 5 V
供給電圧-最大:
5.25 V
供給電圧-最小:
4.75 V
最低動作温度:
- 40 C
最高作動温度:
+ 85 C
パッケージ/ケース:
QSOP-20
包装:
リール
関数:
透明
高さ:
1.5 mm
長さ:
8.75 mm
出力タイプ:
3-State
タイプ:
Dタイプ
幅:
4 mm
ブランド:
テキサスインスツルメンツ
取り付けスタイル:
SMD / SMT
チャネル数:
8 Channels
入力行数:
8 Line
動作供給電流:
200 uA
動作供給電圧:
5 V
製品タイプ:
ラッチ
リセットタイプ:
リセットなし
ファクトリーパックの数量:
1
サブカテゴリ:
ロジックIC
単位重量:
0.008508 oz
Tags
CY74FCT2373T, CY74FCT2373, CY74FCT23, CY74FCT2, CY74FCT, CY74FC, CY74F, CY74, CY7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC 8-BIT LATCH 3-ST 20-QSOP
***eco
REDUCED DRIVE LATCH <AZ
***as Instruments
The CY74FCT2373T is an 8-bit, high-speed CMOS, TTL-compatible buffered latch with 3-state outputs that is ideal for driving high-capacitance loads, such as memory and address buffers. On-chip 25- termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2373T can replace the CY74FCT373T to reduce noise in an existing design. When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE\) input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
モデル 説明 ストック 価格
CY74FCT2373TQCTE4
DISTI # CY74FCT2373TQCTE4-ND
IC 8-BIT LATCH 3-ST 20-QSOP
RoHS: Compliant
Min Qty: 2500
Container: Tape & Reel (TR)
Limited Supply - Call
    CY74FCT2373TQCTE4
    DISTI # 595-Y74FCT2373TQCTE4
    Latches Octal D-Type Transp Latches
    RoHS: Compliant
    0
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      ブランドニューオリジナル
      可用性
      ストック:
      Available
      注文中:
      2000
      数量を入力してください:
      CY74FCT2373TQCTE4の現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
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