SN74S374DWRE4

SN74S374DWRE4
Mfr. #:
SN74S374DWRE4
説明:
Flip Flops Octal D-Ty Positive Edge-Trig F-F
ライフサイクル:
メーカー新製品
データシート:
SN74S374DWRE4 データシート
配達:
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ECAD Model:
詳しくは:
SN74S374DWRE4 詳しくは SN74S374DWRE4 Product Details
製品属性
属性値
メーカー:
テキサスインスツルメンツ
製品カテゴリ:
ビーチサンダル
JBoss:
Y
回路数:
8
ロジックファミリ:
74S
ロジックタイプ:
Dタイプ透明ラッチ
極性:
非反転
入力方式:
平行
出力タイプ:
シングルエンド
伝播遅延時間:
17 ns
高レベル出力電流:
- 6.5 mA
低レベル出力電流:
20 mA
供給電圧-最小:
4.75 V
供給電圧-最大:
5.25 V
最低動作温度:
0 C
最高作動温度:
+ 70 C
取り付けスタイル:
SMD / SMT
パッケージ/ケース:
SOIC-20
包装:
リール
関数:
Dタイプバスインターフェース
高さ:
2.35 mm
長さ:
12.8 mm
幅:
7.52 mm
ブランド:
テキサスインスツルメンツ
チャネル数:
8
入力行数:
3
出力ラインの数:
8
動作供給電圧:
4.75 V to 5.25 V
製品タイプ:
ビーチサンダル
ファクトリーパックの数量:
1
サブカテゴリ:
ロジックIC
単位重量:
0.028254 oz
Tags
SN74S374D, SN74S374, SN74S37, SN74S3, SN74S, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE POS TRG SNGL 20SOIC
***as Instruments
These 8-bit registers feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pullup components. These devices are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches of the ’LS373 and ’S373 are transparent D-type latches, meaning that while the enable (C or CLK) input is high, the Q outputs follow the data (D) inputs. When C or CLK is taken low, the output is latched at the level of the data that was set up. The eight flip-flops of the ’LS374 and ’S374 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs are set to the logic states that were set up at the D inputs. Schmitt-trigger buffered inputs at the enable/clock lines of the ’S373 and ’S374 devices simplify system design as ac and dc noise rejection is improved by typically 400 mV due to the input hysteresis. A buffered output-control (OC) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. OC\ does not affect the internal operation of the latches or flip-flops. That is, the old data can be retained or new data can be entered, even while the outputs are off.
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Mfr.#: SN74S37N.

OMO.#: OMO-SN74S37N--1190

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可用性
ストック:
Available
注文中:
3500
数量を入力してください:
SN74S374DWRE4の現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
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