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ADF4196BCPZ-RL7

ADF4196BCPZ-RL7
Mfr. #:
ADF4196BCPZ-RL7
メーカー:
Analog Devices Inc.
説明:
Phase Locked Loops - PLL 6GHz ultra fast settling Fractional-N PL
ライフサイクル:
メーカー新製品
データシート:
ADF4196BCPZ-RL7 データシート
配達:
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ECAD Model:
詳しくは:
ADF4196BCPZ-RL7 詳しくは ADF4196BCPZ-RL7 Product Details
製品属性
属性値
メーカー：
アナログ・デバイセズ
製品カテゴリ：
フェーズロックループ-PLL
JBoss：
Y
タイプ：
分数-N
回路数：
1
最大入力周波数：
6 GHz
供給電圧-最大：
3.3 V
供給電圧-最小：
2.7 V
最低動作温度：
- 40 C
最高作動温度：
+ 85 C
取り付けスタイル：
SMD / SMT
パッケージ/ケース：
LFCSP-32
包装：
リール
シリーズ：
ADF4196
ブランド：
アナログ・デバイセズ
開発キット：
EV-ADF4196SD1Z
動作供給電流：
68 mA
製品タイプ：
PLL-フェーズロックループ
ファクトリーパックの数量：
1500
サブカテゴリ：
ワイヤレスおよびRF集積回路
Tags
ADF419, ADF41, ADF4, ADF
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***ical
Clock Generator 400MHz to 6GHz-IN 750MHz-OUT 32-Pin LFCSP EP T/R
***et
PLL Frequency Synthesizer Single 32-Pin LFCSP EP T/R
***log Devices
The ADF4196 frequency synthesizer can be used to implement local oscillators (LO) in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture is specifically designed to meet the GSM/EDGE lock time requirements for base stations, and the fast settling feature makes the ADF4196 suitable for pulse Doppler radar applications. The ADF4196 consists of a low noise, digital phase frequency detector (PFD) and a precision differential charge pump. A differential amplifier converts the differential charge pump output to a single-ended voltage for the external voltage controlled oscillator (VCO). The sigma-delta (Σ-Δ) based fractional interpolator, working with the N divider, allows programmable modulus fractional-N division. Additionally, the 4-bit reference (R) counter and on-chip frequency doubler allow selectable reference signal (REFIN) frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a VCO. The switching architecture ensures that the PLL settles within the GSM time slot guard period, removing the need for a second PLL and associated isolation switches. This decreases the cost, complexity, PCB area, shielding, and characterization found on previous ping-pong GSM PLL architectures. Applications GSM/EDGE base stations PHS base stations Pulsed Doppler radar Instrumentation and test equipment Beam-forming/phased array systems
ADF4196 Fractional-N PLLs Frequency Synthesizers
Analog Devices ADF4196 Fractional-N PLLs Frequency Synthesizers implement local oscillators (LO) in the up-conversion and down-conversion sections of wireless transmitters and receivers. ADF4196's design meets the GSM/EDGE lock-time requirements for base stations. The series's fast settling capability makes the ADF4196 well-suited for pulse Doppler radar applications. The design includes a low-noise, digital phase frequency detector (PFD) and a precision differential charge pump. ADF419's differential amplifier converts the output of the differential charge pump to a single-ended voltage for the external voltage-controlled oscillator (VCO). The sigma-delta (Σ-Δ) based fractional interpolator, in conjunction with the N divider, enables programmable modulus fractional-N division. Designers can implement a complete phase-locked loop (PLL) if the synthesizer is used with a VCO and an external loop filter. ADF419's switching architecture ensures that the PLL settles within the GSM time-slot guard period. This switching architecture eliminates the need for a second PLL and associated isolation switches. The fractional-N PLL architecture decreases the complexity, PCB area, shielding, and characterization compared to previous ping-pong GSM PLL architectures.Learn More
RF, Microwave & Millimeter Wave ADI SLP
モデル メーカー 説明 ストック 価格
ADF4196BCPZ-RL7
DISTI # ADF4196BCPZ-RL7-ND		Analog Devices Inc6GHZ ULTRA FAST SETTLING FRACTIO
RoHS: Compliant
Min Qty: 1500
Container: Tape & Reel (TR)		Temporarily Out of Stock
  • 1500:$12.4355
ADF4196BCPZ-RL7
DISTI # 584-ADF4196BCPZ-RL7		Analog Devices IncPhase Locked Loops - PLL 6GHz ultra fast settling Fractional-N PL
RoHS: Compliant		0
  • 1500:$11.4500
画像 モデル 説明
ADF4196BCPZ

Mfr.#: ADF4196BCPZ

OMO.#: OMO-ADF4196BCPZ

 Phase Locked Loops - PLL 6GHz ultra fast settling Fractional-N PL
ADF4196BCPZ-RL7

Mfr.#: ADF4196BCPZ-RL7

OMO.#: OMO-ADF4196BCPZ-RL7

 Phase Locked Loops - PLL 6GHz ultra fast settling Fractional-N PL
ADF4196BCPZ

Mfr.#: ADF4196BCPZ

OMO.#: OMO-ADF4196BCPZ-ANALOG-DEVICES-INC-ADI

 Phase Locked Loops - PLL
ADF4196BCPZ-RL7

Mfr.#: ADF4196BCPZ-RL7

OMO.#: OMO-ADF4196BCPZ-RL7-ANALOG-DEVICES-INC-ADI

 Phase Locked Loops - PLL
可用性
ストック:
Available
注文中:
5000
数量を入力してください:
ADF4196BCPZ-RL7の現在の価格は参考用です。最高の価格をご希望の場合は、お問い合わせまたは直接メールで営業チーム[email protected]までご連絡ください。
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