| PartNumber | 74HC112PW,118 | 74HC112PW,112 |
| Description | Flip Flops DUAL J-K NEG EDGE | Flip Flops DUAL J-K NEG EDGE |
| Manufacturer | Nexperia | NXP Semiconductors |
| Product Category | Flip Flops | Logic - Flip Flops |
| RoHS | Y | - |
| Number of Circuits | 2 | - |
| Logic Family | HC | - |
| Logic Type | J-K Negative Edge Triggered Flip-Flop | - |
| Polarity | Inverting/Non-Inverting | - |
| Input Type | Single-Ended | - |
| Output Type | Differential | Differential |
| Propagation Delay Time | 17 ns at 5 V | - |
| High Level Output Current | - 7.8 mA | - |
| Low Level Output Current | 7.8 mA | - |
| Supply Voltage Min | 2 V | - |
| Supply Voltage Max | 6 V | - |
| Minimum Operating Temperature | - 40 C | - |
| Maximum Operating Temperature | + 125 C | - |
| Mounting Style | SMD/SMT | - |
| Package / Case | TSSOP-16 | - |
| Packaging | Reel | Tube Alternate Packaging |
| Function | JK Type | Set(Preset) and Reset |
| Height | 0.95 mm | - |
| Length | 5.1 mm | - |
| Quiescent Current | 4 uA | - |
| Width | 4.5 mm | - |
| Brand | Nexperia | - |
| Number of Channels | 2 | - |
| Number of Input Lines | 2 | - |
| Number of Output Lines | 1 | - |
| Operating Supply Voltage | 5 V | - |
| Product Type | Flip Flops | - |
| Reset Type | Set, Reset | - |
| Factory Pack Quantity | 2500 | - |
| Subcategory | Logic ICs | - |
| Part # Aliases | 74HC112PW-T | - |
| Series | - | 74HC |
| Type | - | JK Type |
| Package Case | - | 16-TSSOP (0.173", 4.40mm Width) |
| Operating Temperature | - | -40°C ~ 125°C (TA) |
| Mounting Type | - | Surface Mount |
| Voltage Supply | - | 2 V ~ 6 V |
| Frequency Clock | - | 71MHz |
| Number of Elements | - | 2 |
| Current Output High Low | - | 5.2mA, 5.2mA |
| Max Propagation Delay V Max CL | - | 30ns @ 6V, 50pF |
| Current Quiescent | - | 4μA |
| Number of Bits per Element | - | 1 |
| Trigger Type | - | Negative Edge |
| Input Capacitance | - | 3.5pF |